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001 Ai Topological Sort

036-cpu-cache-locality

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Why and How Cache Locality Can Make Your Code Faster

Source: https://arpitbhayani.me/blogs/cpu-cache-locality Date: 2025-09-04

While we write code thinking about algorithms and data structures, the CPU is quietly making millions of decisions about what data to keep close and what to evict from its precious cache memory.

One of the most significant factors determining whether your code runs fast or crawls is something that many engineers never directly interact with: CPU cache locality.

While we write code thinking about algorithms and data structures, the CPU is quietly making millions of decisions about what data to keep close and what to evict from its precious cache memory.

Understanding cache locality is the difference between code that scales linearly and code that hits performance walls seemingly out of nowhere. A simple change in how you access memory can result in 10x, 50x, or even 100x performance differences. Let’s dig deeper…

001-ai-topological-sort.md
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002 Temporal Primer
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003 Rag Production
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004 Structure Of Llm Chat
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005 How Llms Work
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006 Monolith Is Distributed System
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007 Defensive Databases
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008 Bm25
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009 Join Algorithms
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010 Venting At Work
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011 Half Life
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012 Multi Paxos
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013 Mysql Replication Internals
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014 Bloom Filters
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016 Kafka Partitions
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017 Product Quantization
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018 Qkv Matrices
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019 Deleted Production
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020 How Llm Inference Works
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021 Blocking Queues
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022 Heartbeats In Distributed Systems
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023 Cassandra Writes
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024 Redis Replication
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029 Grpc Http2
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033 Stay Relevant At Higher Salary Levels
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034 Why Consensus
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035 Database Deadlocks
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036 Cpu Cache Locality
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037 Eventual Consistency
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038 Dns Udp Tcp
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039 Masters
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040 Empathy Makes Great Engineers Unstoppable
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041 Good Mentors Build People
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042 Always Have Back Burner Projects
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043 Before You Push Back Know What Youre Standing On
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044 Be The One They Can Count On
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045 How Much People Bet On You
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046 How To Get Leadership To Say Yes To Your Project
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047 Dont Let Your Best Ideas Die In Silence
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048 Be Someone Others Want To Work With
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049 Dont Fall For Xy Problem Ask Right Questions
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050 Biggest Lie Startups Tell Engineers
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051 Promotions Are Proactive Not Reactive
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052 Not Enough To Be Right Learn To Be Heard
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053 No One Ships Alone
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054 Not Every Mistake Needs A Correction
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055 Build Influence At Work
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056 Your Soft Skills Arent Soft At All
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057 Experience Before Forming Opinion
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058 Curiosity And High Bias For Action
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059 Worklog
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060 Mistakes And Growth
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061 Own It Instead Of Sweeping It Aside
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062 Dont Wait Step Up
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064 Interview Bias And What Sets You Apart
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066 Okr
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068 When In Doubt Code It Out
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070 Lead Projects That Land
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071 Abstract Thinking Skill Next Decade
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072 We Engineers Suck At Task Estimation
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073 Shiny Object Syndrome In Tech
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074 3p
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075 Leverage The Equilibrium
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076 On Demand Container Loading In Aws Lambda
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077 Sql Has Problems We Can Fix Them Pipe Syntax In Sql
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078 Nanolog A Nanosecond Scale Logging System
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079 Best Resource Is Mythical
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080 Wtf The Who To Follow Service At Twitter
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081 Know A Lot
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082 Out Of Syllabus
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083 Negotiate The Offer
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084 Never Bad Mouth Your Ex Exployer
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085 Culture Fit
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086 Quantification In Resume
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087 Hiring Is Unfair
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088 Questions For Interviewers
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089 Collaboration Communication
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090 Out Of Vicious Interview Cycle
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091 Pitch Projects Not Ideas
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092 Read Design Docs
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093 Read Rca Docs
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094 Start Generalist
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095 Do Not Rely On Summaries
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096 Structure Your Design Interviews
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097 Title Inflation
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098 Find Your Own Project
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099 Six Pointers To Crack Coding And Design Interviews
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100 Keep Yourself Unblocked
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101 Genetic Knapsack
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102 Pseudorandom Number Generation Lfsr
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103 How Indexes Work On Partitioned And Sharded Data
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104 Some Data Partitioning Strategies For Distributed Data Stores
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105 Data Partitioning
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106 Leaderless Replication
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107 Conflict Resolution
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108 Conflict Detection
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109 Multi Master Replication
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110 Monotonic Reads
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111 Read Your Write Consistency
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112 Handling Outages Master Replica
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113 Replication Formats
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114 Replication Strategies
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115 Master Replica Replication
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116 Durability
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117 Isolation
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118 Atomicity
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119 Consistency
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120 Architectures In Distributed Systems
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121 Mistaken Beliefs Of Distributed Systems
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122 Fork Bomb
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123 Chained Operators Python
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124 Taxonomy On Sql
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125 The Weird Walrus
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126 Fully Persistent Arrays
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127 Persistent Data Structures Introduction
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128 Constant Folding Python
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129 String Interning Python
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130 Recursion Visualizer Python
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131 Flajolet Martin
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132 2q Cache
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133 Israeli Queues
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134 1d Terrain
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135 Jaccard Minhash
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136 Ts Smoothing
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137 Lfu
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138 Morris Counter
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139 Slowsort
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140 Bitcask
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141 Phi Accrual
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142 10x Engineer
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143 Decipher Repeated Key Xor
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144 Decipher Single Xor
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145 Python Iterable Integers
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146 Inheritance C
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147 Rum
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148 Consistent Hashing
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149 Python Caches Integers
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150 Fractional Cascading
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151 Copy On Write
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154 Bayesian Average
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157 Better Programmer
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158 Python Prompts
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159 Rule 30 Cellular Automata
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160 Function Overloading
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161 Isolation Forest
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162 Image Steganography
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163 Long Integers Python
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164 I Changed My Python
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165 Benchmark And Compare Pagination Approach In Mongodb
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166 Mongodb Cursor Skip Is Slow
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167 Fast And Efficient Pagination In Mongodb
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168 Making Http Requests Using Netcat
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Why Cache Exists

Speed v/s capacity is the fundamental trade-off here. Fast memory is expensive and limited, while cheap memory is slow. This creates a hierarchy where each level trades speed for capacity

  • CPU Registers: ~1 cycle access, 32-64 registers
  • L1 Cache: ~1-3 cycles, 32-64 KB per core
  • L2 Cache: ~10-20 cycles, 256 KB - 1 MB per core
  • L3 Cache: ~40-75 cycles, 8-32 MB shared
  • Main Memory (RAM): ~200-300 cycles, 8-128 GB
  • SSD Storage: ~50,000-100,000 cycles, 500 GB - 4 TB
  • Hard Drive: ~10,000,000 cycles, 1-20 TB

The gap between L1 cache and main memory is roughly 100-300x in latency. This isn’t just a minor inconvenience; it’s a performance cliff that can make or break your application.

Cache Lines

CPUs don’t fetch individual bytes from memory. Instead, they work with cache lines, typically 64 bytes on modern x86 processors. When you access a single byte, the CPU fetches the entire 64-byte block containing that byte.

This design assumes spatial locality, i.e., if you access one memory location, you’ll likely access nearby locations soon. This assumption drives much of cache behavior and optimization strategies.

Types of Cache Locality

Temporal Locality

Temporal locality means that recently accessed data is likely to be accessed again soon. This is why keeping frequently used variables in scope and avoiding unnecessary memory allocations can dramatically improve performance.

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Spatial Locality

Spatial locality means that accessing nearby memory locations is more efficient than accessing scattered locations. This is directly related to cache line behavior.

Let’s take an example of taking a matrix of size n x n and setting every value to 1. But let’s do this in two flavours

  • row-major access
  • column-major access
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The difference between these two approaches is dramatic. The following table shows the benchmark for different sizes.

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CPUs fetch 64-byte cache lines, which cover 16 integers on 32-bit systems. When we are accessing the matrix in row-major access, all 16 integers in the cache line are used. But, in column-major access, only 1 integer per cache line is used (15 wasted).

Example: Redis Eviction Pool

Redis maintains its eviction pool as a static array rather than a linked list primarily to optimize for spatial locality during the critical eviction process.

Redis samples random keys and maintains a small pool (typically 16 entries) of the best eviction candidates sorted by their idle time or access frequency. Using a contiguous array ensures that all candidate entries reside within a few cache lines, allowing the CPU to efficiently compare and sort candidates without cache misses.

The array-based approach eliminates the pointer-chasing behavior inherent in linked lists, potentially causing cache misses and memory stalls during time-sensitive eviction decisions.

Here’s the snippet from Redis’s source code src/evict.c).

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Measuring Cache Performance

CPUs provide hardware counters that let you measure cache behavior directly using perf. Some key metrics to look for are

  • Cache miss rate: % of memory accesses that miss the cache
  • L1/L2/L3 miss rates: Miss rates at each cache level
  • Instructions per cycle (IPC): Overall CPU efficiency
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Optimization Strategies

  • Loop Tiling/Blocking: Break large loops into smaller chunks that fit in cache to maximize data reuse before eviction.
  • Cache-Oblivious Algorithms: Design algorithms that perform well across different cache sizes without knowing specific cache parameters.
  • Prefetching: Provide hints to the CPU about future memory accesses to load data into cache before it’s needed.
  • False Sharing Mitigation: Pad data structures to ensure different threads access separate cache lines and avoid unnecessary cache coherency traffic.

We will look at each one of these in depth in some other blog.

Footnotes

Cache locality is one of the most impactful yet often overlooked aspects of performance optimization. Understanding how CPUs cache data and designing your algorithms and data structures accordingly can provide massive performance improvements.

As engineers, we often focus on algorithmic complexity (Big O notation), but cache performance can dominate real-world execution time, especially in-memory data processing workloads.

Interestingly, a linear algorithm with poor cache locality can be slower than a logarithmic algorithm with good cache locality for realistic data sizes.